1. Field of the Invention
The present invention relates to a fabricating method of a nonvolatile semiconductor storage apparatus, and more particularly, is preferably applied to a method in which dust on a hard mask used in etching a ferroelectric film can be reduced.
2. Description of the Related Art
Some of the nonvolatile semiconductor storage apparatuses are ferroelectric memories in which ferroelectric substance such as lead zirconate titanate (PZT:Pb(Zr,Ti)O3) and tantalic acid strontium bismuth (SBT:SrBi2Ta2O9) is used as capacity insulating films.
Chemical stability of ferroelectric substance is high. Thus, processing of ferroelectric substance requires stronger physical etching element or enhanced reactivity. Therefore, when etching ferroelectric substance by using a resist mask, it is difficult to secure enough selection ratio between the ferroelectric substance and the resist mask. Thus, a hard mask made from substance such as aluminum oxide (Al2O3) is sometimes used as an etching mask.
In Japanese Patent Application Laid-open No. 2006-32734, a method is disclosed in which formation of a seam or a void in a hydrogen protective film, formation of an oxygen leak path formed in a hydrogen protective film, or reduction deterioration of a ferroelectric film due to being exposed to hydrogen atmosphere in a post process is prevented by planarizing a top electrode of a ferroelectric capacitor by employing chemical mechanical planarization (CMP).
Here, if there is dust on a hard mask that serves as an etching mask used in etching ferroelectric substance, the accuracy of the shape of the hard mask degrades in the area on which there is dust. Therefore, a shape defect may be caused to decrease a fabrication yield.
By the method disclosed in Japanese Patent Application Laid-open No. 2006-32734, a top electrode of a ferroelectric capacitor is planarized by employing CMP, and thus, dust on the top electrode can be removed. Dust on a hard mask used in etching ferroelectric substance, however, cannot be removed. Accordingly, the method disclosed therein has a problem that the shape defect cannot be reduced.
According to a method disclosed in Japanese Patent Application Laid-open No. 2008-159924, a hard mask formed from material such as TiN is formed on a first conductive film formed from IrO2 via an alumina sacrificial film, an area on the first conductive film not covered by the hard mask is patterned, and then, the alumina sacrificial film is removed therefrom by performing a wet treatment. Thus, the hard mask is removed from the first conductive film pattern, and reattachment of residue, scum, or the like attached to the surface of the hard mask is prevented.
By the method disclosed in Japanese Patent Application Laid-open No. 2008-159924, however, wet treatment is performed on the alumina sacrificial film after patterning the first conductive film, and the first conductive film is etched with residue, scum, or the like attached to the surface of the hard mask. Therefore, shape defect of a pattern caused upon etching cannot be reduced.